library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity BoardTop is
--DEJALO GENERIC ACA ARRIBA PARA PODER MODIFICARLO EN LA SIMULACION
	generic(W:integer:=16;
		  WORDS:integer:=1;   --WORDS=ceil(W/DBUS);

		  ABUS:integer:=18;  --BUS DE DIRECCION DE LA RAM
		  DBUS: integer:=16; --BUS DE DATOS DE LA RAM
                -- Default settings:
                -- 19200 baud, 8 data bits, 1 stop bit
              DBIT: integer:=8;               -- # data bits
              SB_TICK: integer:=16;   -- # ticks for stop bits. 16/24/32 
              DVSR: integer:= 163;    -- baud rate divisor
              DVSR_BIT: integer:=8   -- # bits of DVSR
		 );

	port(
       pulsador         : in  std_logic_vector(3 downto 0);    
       xtal             : in  std_logic;
	 reset		: in std_logic; 
       vsinc_o          : out std_logic;
	 hsinc_o          : out std_logic;
	 red_o            : out std_logic;
	 green_o          : out std_logic;
	 blue_o           : out std_logic;
	 uart_rx          : in  std_logic;
	 uart_tx          : out  std_logic;
       ad               : out std_logic_vector(17 downto 0); 
       we_n, oe_n       : out std_logic;
       dio_a            : inout std_logic_vector(15 downto 0);
       ce_a_n, ub_a_n, lb_a_n:    out std_logic;
	 --TESTBENCH_PORTS
	 tx_done_tick	: out std_logic;
	 tx_start		: in std_logic:='0';
	 tx_din		: in std_logic_vector(DBIT-1 downto 0):=(others=>'1');
	 ad_restart		: out std_logic
       );
       
   attribute LOC                   : string; --Por las dudas
   attribute slew 	                : string;
   attribute iostandard            : string;
   attribute drive 	               : string;
   
   attribute LOC of xtal           : signal is "T9"; 
   attribute LOC of pulsador       : signal is "L14 L13 M14 M13";
--   attribute LOC of reset		: signal is  "DONDE PONEMOS EL RESET"???

   attribute loc of hsinc_o 	      : signal is "R9";
   attribute loc of vsinc_o 	      : signal is "T10";
   attribute loc of red_o 	        : signal is "R12";
   attribute loc of green_o 	      : signal is "T12";
   attribute loc of blue_o 	       : signal is "R11";
   
   attribute loc of oe_n      :signal is "K4";
   attribute loc of we_n      :signal is "G3";
   attribute loc of ce_a_n	   :signal is  "P7";
   attribute loc of ub_a_n	   :signal is  "T4";
   attribute loc of lb_a_n	   :signal is  "P6";
   attribute loc of ad        :signal is  "L3 K5 K3 J3 J4 H4 H3 G5 E4 E3 F4 F3 G4 L4 M3 M4 N3 L5";
   attribute loc of dio_a      :signal is  "R1 P1 L2 J2 H1 F2 P8 D3 B1 C1 C2 R5 T5 R6 T8 N7";

   attribute loc of uart_tx: signal is "R13";
   attribute loc of uart_rx: signal is "T13";

end entity;   




--------------------

architecture arch of BoardTop is

   
architecture arch of BoardTop is

   
   component Matiastop is
		port(     
      pulsador       : in  std_logic_vector(3 downto 0);    
      xtal           : in  std_logic;
      enable         : in  std_logic;
      Xin            : in  std_logic_vector(15 downto 0);
      Yin            : in  std_logic_vector(15 downto 0);
      Zin            : in  std_logic_vector(15 downto 0);
		vsinc_o	 		: out std_logic;
		hsinc_o	 		: out std_logic;
		red_o		  		: out std_logic;
	   green_o	 		: out std_logic;
	   blue_o	  		: out std_logic
   ); 
	end component;
	 
--ROTADOR - MUNDO	 
	signal Yvideo : integer range 639 downto 0;
	signal Zvideo : integer range 479 downto 0;
	signal vale: std_logic; --

--PUERTO SERIE-DMA
	signal rx_data : std_logic_vector(DBIT-1 downto 0);
	signal rx_done_tick: std_logic;
--CORDIC - DMA
	signal outX,outY,outZ : std_logic_vector(W-1 downto 0);
	signal mode,read_dma,dma_busy: std_logic;
--LOS DOS BUCHONEAN EN '1'
	signal vector_tick:std_logic; --BUCHON DE ESTABLE (estable por 4 clocks), DURA 1 clock levantado.
	signal restart:std_logic; --VUELVE A ARRANCAR CON LOS VECTORES DESDE 0, DURA 1 clock, (te lo puedo dar mas corto);
	signal reset_vectors:std_logic:='0';
--MEMORIA - DMA
	signal mem, rw , ready :std_logic;
	signal address: std_logic_vector(ABUS-1 downto 0);
	signal w_dbus, r_dbus: std_logic_vector(DBUS-1 downto 0);

--ROTADOR3D
	signal aux_pulsador: std_logic_vector(5 downto 0);

---------------------------

begin
    
mat: Matiastop port map(pulsador,xtal,vector_tick,outx,outy,outz,vsinc_o,hsinc_o,red_o,green_o,blue_o);

read_dma<=not dma_busy; -- loopback;

DMA0:entity work.dmaModule(arch)
	generic map(DBIT=>8,W=>W,WORDS=>WORDS,ABUS=>ABUS,DBUS=>DBUS)
	port map(		--GENERALES
		clk => xtal, reset => reset, mode => mode, rx_data => rx_data,
		rx_done_tick => rx_done_tick, outX => outX, outY => outY,
		outZ => outZ, read_enable => '1', read => read_dma,
            busy => dma_busy, vector_tick => vector_tick, restart=> restart,
            reset_vectors=>reset_vectors, mem => mem,
		rw => rw, sram_ready => ready, sram_address => address,
		sram_write_dbus => w_dbus, sram_read_dbus => r_dbus
	    );

UART0:entity work.uartModule(arch)
	generic map (DBIT=>DBIT, SB_TICK=>SB_TICK, DVSR=>DVSR, DVSR_BIT=>DVSR_BIT)
	port map( clk=>xtal,reset=>reset,rx=>uart_rx, tx => uart_tx, rx_done_tick=>rx_done_tick,
			tx_done_tick=>tx_done_tick, tx_start => tx_start, dout => rx_data, din => tx_din
	    );

MEMCTRL0:entity work.sram_ctrl(arch)
	port map(clk=>xtal, reset=>reset, mem=>mem,rw=>mode, addr=>address,
			data_f2s=>w_dbus, ready=>ready,
			data_s2f_r=>r_dbus, data_s2f_ur=>open,
			ad=>ad, we_n=>we_n, oe_n=>oe_n, dio_a=>dio_a,
			ce_a_n=>ce_a_n, ub_a_n=>ub_a_n, lb_a_n=>lb_a_n);


--PARA SIMULAR

ad_restart<=restart;
end arch;
